Since its founding in 2000, Ridgetop has pioneered the design and introduction of sophisticated die-level test structures. These test structures are precisely calibrated for specific foundry processes down to 28 nm.
Ridgetop's nanoDFM technologies apply advanced and patented in-situ test structures and iterative improvements. By providing performance metrics and electrical testing, useful lifetime is increased and yields improved. To do this, the most sensitive circuits must be identified as well as the mechanisms likely to have negative effects.
nanoDFM Design Flow Using PDKChek™
Ridgetop's Sentinel Silicon library includes precision measurement structures for:
- TDDB - Time Dependent Dielectric Breakdown
- HCI - Hot Carrier Damage
- NBTI - Negative Bias Temperature Instability
- Radiation Damage - RadCell Fox (Field Oxide) and RadCell VT (Threshold Voltage)
Ridgetop's YieldMaxx™ tool includes the patented die-level mismatch structure, with user-selected parameters, including:
- VT mismatch
- I(on) mismatch
- Resistance mismatch
- Capacitance mismatch
Instacell IP Cores
Ridgetop's ADC architecture is optimized for high performance. Applications include industrial control, automotive and consumer electronics.
Ridgetop's DAC architecture is proven in silicon for rigorous applications.
Ridgetop also offers silicon-validated bandgap reference (BGR) cores that are very stable over temperature and supply voltage variations. Please contact us for more information.